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Karlsruhe Institute of Technology

Young Investigator Network
YIN-Office

Engler-Bunte-Ring 21
76131 Karlsruhe

 

Tel. +49 721 608-46184

E-Mail: infoWwc0∂yin kit edu

 

Das KIT ist seit 2010 als familiengerechte Hochschule zertifiziert.
Dr. Lars Bauer

Dr. Lars Bauer

[sci.] Group Leader at the Chair for Embedded Systems
Informatics
embedded systems

Group: [prev.] YIG
Room: Germany, KIT
Phone: +49 721 608-44218
lars bauerAmw1∂kit edu


Institut für Technische Informatik

Lehrstuhl für Eingebettete Systeme

Campus Süd

Haid-und-Neu-Str. 9

76137 Karlsruhe



Ausgewählte Publikationen

 

Books

  • L. Bauer, J. Henkel, “Run-time Adaptation for Reconfigurable Embedded Processors”, Springer Science+Business Media, LLC, 2011, ISBN 978-1-4419-7411-2, e-ISBN 978-1-4419-7412-9, DOI 10.1007/978-1-4419-7412-9.

 

 

Journals/Magazines

  • M. Shafique, L. Bauer, J. Henkel, “Optimizing the H.264/AVC Video Encoder Application Structure for Reconfigurable and Application-Specific Platforms”, Journal of Signal Processing Systems (JSPS’10), Special Issue: Embedded Multimedia Systems, Volume 60, Issue 2, pp. 183-210, August 2010.
  • L. Bauer, M. Shafique, J. Henkel, “Efficient Resource Utilization for an Extensible Processor through Dynamic Instruction Set Adaptation”, IEEE Transaction on Very Large Scale Integration (TVLSI’08), Special Section on Application-Specific Processors, Volume 16, Issue 10, pp. 1295-1308, October 2008.

 

 

Conferences/Symposia

  • S. Kobbe, L. Bauer, J. Henkel, D. Lohmann, W. Schröder-Preikschat: “DistRM: Distributed Resource Management for On-Chip Many-Core Systems”, IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS’11) Taipei, Taiwan, October 2011 (accepted for publication).
  • W. Ahmed, M. Shafique, L. Bauer, J. Henkel: “Adaptive Resource Management for Simultaneous Multitasking in Mixed-Grained Reconfigurable Multi-core Processors”, IEEE International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS’11), Taipei, Taiwan, October 2011 (accepted for publication).
  • J. Henkel, L. Bauer, M. Hübner, A. Grudnitsky: “i-Core: A run-time adaptive processor for embedded multi-core systems”, International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA’11), Las Vegas, Nevada, USA, July 2011 (invited paper, accepted for publication).
  • L. Bauer, M. Shafique, J. Henkel, “Concepts, Architectures, and Run-time Systems for Efficient and Adaptive Reconfigurable Processors”, NASA/ESA 6th Conference on Adaptive Hardware and Systems (AHS’11), San Diego, CA, USA, June 2011 (invited paper).
    Received the
    MaXentric Technologies AHS’11 Best Paper Award.
  • W. Ahmed, M. Shafique, L. Bauer, M. Hammerich, J. Henkel, J. Becker, “Run-Time Resource Allocation for Simultaneous Multi-Tasking in Multi-Core Reconfigurable Processors”, IEEE 19th Symposium on Field-Programmable Custom Computing Machines (FCCM’11), Salt Lake City, Utah, USA, pp. 29-32, May 2011.
  • M. Shafique, L. Bauer, W. Ahmed, J. Henkel, “Minority-Game-based Resource Allocation for Run-Time Reconfigurable Multi-Core Processors”, IEEE/ACM 14th Design Automation and Test in Europe Conference (DATE’11), Grenoble, France, pp. 1261-1266, March 2011.
  • W. Ahmed, M. Shafique, L. Bauer, J. Henkel, “mRTS: Run-Time System for Reconfigurable Processors with Multi-Grained Instruction-Set Extensions”, IEEE/ACM 14th Design Automation and Test in Europe Conference (DATE’11), Grenoble, France, pp. 1554-1559, March 2011.
  • M. Shafique, L. Bauer, J. Henkel, “Selective Instruction Set Muting for Energy-Aware Adaptive Processors”, IEEE/ACM 28th International Conference on Computer-Aided Design (ICCAD’10), San Jose, CA, USA, pp. 353-360, November 2010.
    Nominated as IEEE/ACM William J. McCalla ICCAD’10 Best Paper Candidate.
  • R. Koenig, L. Bauer, T. Stripf, M. Shafique, W. Ahmed, J. Becker, J. Henkel, “KAHRISMA: A Novel Hypermorphic Reconfigurable-Instruction-Set Multi-grained-Array Architecture”, IEEE/ACM 13th Design Automation and Test in Europe Conference (DATE’10), Dresden, Germany, pp. 819-824, March 2010.
  • M. Shafique, L. Bauer, J. Henkel, “enBudget: A Run-Time Adaptive Predictive Energy-Budgeting Scheme for Energy-Aware Motion Estimation in H.264/MPEG-4 AVC Video Encoder”, IEEE/ACM 13th Design Automation and Test in Europe Conference (DATE’10), Dresden, Germany, pp. 1725-1730, March 2010.
  • M. Shafique, L. Bauer, J. Henkel, “REMiS: Run-time Energy Minimization Scheme in a Reconfigurable Processor with Dynamic Power-Gated Instruction Set”, IEEE/ACM 27th International Conference on Computer-Aided Design (ICCAD’09), San Jose, California, USA, pp. 55-62, November 2009.
  • L. Bauer, M. Shafique, J. Henkel, “MinDeg: A Performance-guided Replacement Policy for Run-time Reconfigurable Accelerators”, IEEE International Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS’09), Grenoble, France, pp. 335-342, October 2009.
  • L. Bauer, M. Shafique, J. Henkel, “Cross-Architectural Design Space Exploration Tool for Reconfigurable Processors”, IEEE/ACM 12th Design Automation and Test in Europe Conference (DATE’09), Nice, France, pp. 958-963, April 2009.
  • M. Shafique, L. Bauer, J. Henkel, “A Parallel Approach for High Performance Hardware Design of Intra Prediction in H.264/AVC Video Codec”, IEEE/ACM 12th Design Automation and Test in Europe Conference (DATE’09), Nice, France, pp. 1434-1439, April 2009.
  • L. Bauer, M. Shafique, J. Henkel, “A Computation- and Communication-Infrastructure for Modular Special Instructions in a Dynamically Reconfigurable Processor”, IEEE 18th International Conference on Field Programmable Logic and Applications (FPL’08), Heidelberg, Germany, pp. 203-208, September 2008.
  • M. Shafique, L. Bauer, J. Henkel, “3-Tier Dynamically Adaptive Power-Aware Motion Estimator for H.264/AVC Video Encoding”, ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED’08), Bangalore, India, pp. 147-152, August 2008.
  • L. Bauer, M. Shafique, J. Henkel, “Run-time Instruction Set Selection in a Transmutable Embedded Processor”, ACM/IEEE/EDA 45th Design Automation Conference (DAC’08), Anaheim, CA, USA, pp. 56-61, June 2008.
    Received a “European Network of Excellence on High Performance and Embedded Architecture and Compilation” HiPEAC Paper Award.
  • L. Bauer, M. Shafique, S. Kreutz, J. Henkel, “Run-time System for an Extensible Embedded Processor with Dynamic Instruction Set”, IEEE/ACM 11th Design Automation and Test in Europe Conference (DATE’08), Munich, Germany, pp. 752-757, March 2008.
    Received the DATE´08 Best Paper Award.
  • L. Bauer, M. Shafique, D. Teufel, J. Henkel, “A Self-Adaptive Extensible Embedded Processor”, IEEE/ACM First International Conference on Self-Adaptive and Self-Organizing Systems (SASO’07), Boston, MA, USA, pp. 344-347, July 2007.
  • L. Bauer, M. Shafique, S. Kramer, J. Henkel, “RISPP: Rotating Instruction Set Processing Platform”, ACM/IEEE/EDA 44th Design Automation Conference (DAC’07), San Diego, CA, USA, pp. 791-796, June 2007.

 

 

Workshops

  • Benjamin Oechslein, Jens Schedel, Jürgen Kleinöder, Lars Bauer, Jörg Henkel, Daniel Lohmann, Wolfgang Schröder-Preikschat, “OctoPOS: A Parallel Operating System for Invasive Computing”, Systems for Future Multi-Core Architectures (SFMA’11), Salzburg, Austria, April 2011.
  • M. Shafique, L. Bauer, J. Henkel, “Optimized Application Architecture of the H.264 Video Encoder for Application Specific Platforms”, 5th IEEE Workshop on Embedded Systems for Real-Time Multimedia (ESTIMedia’07), Salzburg, Austria, pp. 119-124, October 2007.
  • L. Bauer, M. Shafique, J. Henkel, “Efficient Resource Utilization for an Extensible Processor through Dynamic Instruction Set Adaptation”, 5th Workshop on Application Specific Processors (WASP’07), Salzburg, Austria, pp. 39-46, October 2007.

CV Lars Bauer